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On-device research index

arXiv research

A locally-built, LLM-digested index of recent arXiv papers in quant finance, geometry/topology, and statistical ML — keyword search served straight from SQLite on this machine.

169,051 papers · 148 categories

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246491737982 · Jun 202019922001200920182026
48 results for Hardware Performance Counters

Paper evaluates security of deep learning from side-channel attacks.

problem Security of deep learning algorithms from side-channel attacks.
method Uses hardware performance counters to test for information leakage in CNNs.
result Shows alarms for potential data privacy breaches in CNNs.

Fuelled by increasing computer power and algorithmic advances, machine learning techniques have become powerful tools for finding patterns in data. Since quantum systems produce counter-intuitive patterns believed not to be efficiently produced by classical systems, it is reasonable to postulate that quantum computers …

2016-11-28abs ↗pdf ↗

Complex-valued neural networks improve wireless fingerprinting robustness.

problem Distinguish between devices sending the same message, robust against spoofing.
method Used complex-valued neural networks for supervised learning of fingerprints from wireless signals.
result Noise augmentation by adding white Gaussian noise leads to significant performance gains.

Paper proposes a faster method for evaluating DNN hardware and software designs.

problem Reducing time for evaluating different DNN hardware and software designs.
method Using virtual hardware models to estimate DNN performance at the concept phase.
result Up to 92% accuracy in predicting DNN inference processing time.

Exploration is a fundamental aspect of Reinforcement Learning, typically implemented using stochastic action-selection. Exploration, however, can be more efficient if directed toward gaining new world knowledge. Visit-counters have been proven useful both in practice and in theory for directed exploration. However, a m…

2018-04-11abs ↗pdf ↗

DANCE optimizes neural network and accelerator design for faster, more efficient DNN execution.

problem Challenges in optimizing neural network and accelerator design for efficient DNN execution.
method Differentiable approach to co-exploration of accelerator and network architecture design.
result Significantly shorter time to achieve superior accuracy and hardware cost metrics.

Design automation optimizes deep learning models for various hardware.

problem Designing efficient deep learning models requires balancing algorithm and hardware.
method Proposes design automation techniques for specialized neural networks, including auto pruning and quantization.
result Learning-based automation achieves superior performance and efficiency compared to human design.

Optimized neural networks for Edge TPU achieve high accuracy in real-time image classification.

problem Designing neural networks for hardware accelerators to achieve optimal performance.
method Hardware-aware neural architecture search and model customization for Edge TPU.
result Improved accuracy-latency tradeoff on Pixel 4's Edge TPU compared to existing models.

PABO optimizes DNN and hardware hyperparameters for efficient edge device acceleration.

problem Joint optimization of DNN accuracy and hardware cost for edge devices.
method Bayesian optimization with pseudo agent-based approach for memristive crossbar accelerators.
result PABO achieves significant speed-ups and superior performance compared to state-of-the-art methods.

Researchers show NN-based communication algorithms can be implemented on hardware without significant performance loss.

problem Reducing complexity and improving performance of NN-based communication algorithms for practical hardware implementation.
method Implementation of NN-based algorithms in fixed-point arithmetic with quantized weights on specialized hardware (FPGAs, ASICs).
result It is possible to implement NN-based algorithms in fixed-point arithmetic with quantized weights on hardware without significant performance loss.

Stealthy hardware Trojan exploits DLA architecture vulnerabilities.

problem Security of DLA deployed on hardware accelerators.
method Input Interception Attack (IIA) exploiting statistical properties of DLA outputs.
result Stealthy Trojan can trigger with some definiteness.

Study on pairwise counter-monotonicity, a type of negative dependence.

problem Understanding and quantifying extremal negative dependence structures.
method Established stochastic representation and invariance property; showed implications and connections.
result Pairwise counter-monotonicity implies negative association and joint mix dependence.

Novel NAS method balances performance and hardware metrics efficiently.

problem Challenging multi-objective optimization in neural architecture search.
method Parameterizes joint architectural distribution via hypernetwork conditioned on hardware features and preferences.
result Zero-shot transferability to new devices with representative and diverse architectures.

Method predicts hardware resource usage by control software with guaranteed linear convergence.

problem Predicting time-varying hardware resource availability in control software.
method Path structured multimarginal Schrödinger bridge (MSBP) for learning stochastic resource usage.
result Guaranteed linear convergence to accurate prediction of hardware resource utilization.

New method uses surrogate gradients to train efficient spiking networks on neuromorphic hardware.

problem Training high-performing spiking networks on analog neuromorphic hardware is challenging due to device mismatch and lack of efficient algorithms.
method Introduces a general in-the-loop learning framework based on surrogate gradients.
result Learning self-corrects for device mismatch, resulting in competitive spiking network performance.

A scalable DL benchmarking platform for evaluating and comparing models, frameworks, and hardware.

problem Lack of a uniform DL benchmarking platform for evaluating and comparing innovations.
method Identified 10 design features for a DL benchmarking platform, proposed MLModelScope, and implemented as an open-source project.
result Demonstrated how model, hardware, and framework selection affect accuracy and performance under different scenarios.

This paper characterizes deep learning models in Facebook's data centers and suggests optimizations.

problem Improving performance of deep learning models in data centers.
method Detailed characterizations, high performance optimizations, co-design suggestions.
result Need for better co-design of algorithms, numerics, and computing platforms.

In [1] Zawadoski introduces a banking network model in which the asset and counter-party risks are treated separately and the banks hedge their assets risks by appropriate OTC contracts. In his model, each bank has only two counter-party neighbors, a bank fails due to the counter-party risk only if at least one of its …

2014-02-21abs ↗pdf ↗

This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementatio…

2014-09-09abs ↗pdf ↗

VegasFlow accelerates complex simulations across various hardware platforms.

problem Complex calculations and simulations requiring high-dimensional integrals.
method Monte Carlo integration techniques using Vegas algorithm and TensorFlow.
result Significantly faster performance on various hardware platforms.

Paper presents efficient algorithms for convolutional neural networks using Winograd minimal filtering.

problem Resource-efficient implementation of convolutional neural networks.
method Winograd minimal filtering trick applied to M-tap filters (M=3,5,7,9,11) for parallel hardware implementation.
result Approximately 30% reduction in multipliers for fully parallel hardware implementation.

Recent breakthroughs in Deep Learning (DL) applications have made DL models a key component in almost every modern computing system. The increased popularity of DL applications deployed on a wide-spectrum of platforms have resulted in a plethora of design challenges related to the constraints introduced by the hardware…

2018-09-14abs ↗pdf ↗

Loihi neuromorphic chip outperforms conventional hardware in keyword spotting efficiency.

problem Benchmarking keyword spotting efficiency on neuromorphic hardware.
method Comparative analysis of a two-layer neural network trained to recognize a single phrase on Intel's Loihi neuromorphic chip and conventional hardware devices.
result Loihi outperforms conventional hardware on energy cost per inference for this keyword spotting application.

Packed-Ensembles improve uncertainty estimation in constrained hardware.

problem Hardware limitations restrict the size of ensembles and network capacity, degrading performance.
method Packed-Ensembles (PE) design and train lightweight structured ensembles by modulating encoding space and parallelizing into a single backbone.
result PE accurately preserves diversity and maintains performance on key metrics like accuracy, calibration, and out-of-distribution detection.

Bio-inspired neuromorphic hardware is a research direction to approach brain's computational power and energy efficiency. Spiking neural networks (SNN) encode information as sparsely distributed spike trains and employ spike-timing-dependent plasticity (STDP) mechanism for learning. Existing hardware implementations of…

2018-09-18abs ↗pdf ↗

TRASHFIRE improves model robustness by analyzing training rates and costs.

problem Understanding and predicting model robustness under adversarial conditions.
method Survival models, worst-case examples, cost-aware analysis.
result Deeper models offer marginal robustness gains due to inference time, not inherent robustness.

This paper shows how to calculate risk measures for sums of two counter-monotonic risks.

problem Calculating risk measures for sums of two counter-monotonic risks.
method Using a fixed distortion function and expressing the risk measure of a sum as the sum of two related measures of the marginals.
result The risk measure of a sum of two counter-monotonic risks can be expressed as the sum of two related distortion risk measures of the marginals.

Paper reduces AI complexity with pre-defined sparsity and hardware acceleration.

problem Reduction of computational and storage complexity in neural networks.
method Pre-defined sparsity and hardware acceleration architecture.
result Significant reduction in storage and computational complexity (5X+ reduction) without significant performance loss.

Deep learning has revolutionised many fields, but it is still challenging to transfer its success to small mobile robots with minimal hardware. Specifically, some work has been done to this effect in the RoboCup humanoid football domain, but results that are performant and efficient and still generally applicable outsi…

2018-07-15abs ↗pdf ↗