This paper presents a novel end-to-end methodology for enabling the deployment of low-error deep networks on microcontrollers. To fit the memory and computational limitations of resource-constrained edge-devices, we exploit mixed low-bitwidth compression, featuring 8, 4 or 2-bit uniform quantization, and we model the i…
On-device research index
arXiv research
A locally-built, LLM-digested index of recent arXiv papers in quant finance, geometry/topology, and statistical ML — keyword search served straight from SQLite on this machine.
168,657 papers · 148 categories
Trend · papers per month
22 results for “microcontrollers”
Tiny Eats GRU detects eating episodes on a microcontroller.
problem Automatic dietary monitoring on low-power devices.
method Shallow gated recurrent unit (GRU) architecture on Arm Cortex M0+.
result Tiny Eats GRU achieves 95.15% accuracy with 4% memory usage and 6 ms latency.
Implantable, closed-loop devices for automated early detection and stimulation of epileptic seizures are promising treatment options for patients with severe epilepsy that cannot be treated with traditional means. Most approaches for early seizure detection in the literature are, however, not optimized for implementati…
Designing deep learning models for highly-constrained hardware would allow imbuing many edge devices with intelligence. Microcontrollers (MCUs) are an attractive platform for building smart devices due to their low cost, wide availability, and modest power usage. However, they lack the computational resources to run ne…
This work optimizes DNN inference for energy-harvesting devices by compressing and selectively executing neural network exits.
problem Inference delays and energy inefficiency in energy-harvesting devices.
method Developed a power trace-aware and exit-guided network compression algorithm for multi-exit neural networks.
result Superior accuracy and reduced latency compared to state-of-the-art techniques.
Improved deep learning model deployment on tiny MCUs with mixed-precision quantization.
problem Memory limitations prevent accurate deployment of DNN models on tiny MCUs.
method Automated mixed-precision quantization using Reinforcement Learning for MCU constraints.
result Mixed-precision models achieve high accuracy with uniform quantization policies.
The growing number of low-power smart devices in the Internet of Things is coupled with the concept of "Edge Computing", that is moving some of the intelligence, especially machine learning, towards the edge of the network. Enabling machine learning algorithms to run on resource-constrained hardware, typically on low-p…
Generative compression technique reduces neural network size and improves performance on microcontrollers.
problem Memory constraints on microcontrollers limit the size of neural networks, especially for 1x1 pointwise (PW) mixers.
method HYPER-TINYPW uses a shared micro-MLP to generate PW kernels from tiny per-layer codes, reducing memory usage.
result HYPER-TINYPW achieves comparable performance to larger models while being significantly smaller (225 kB vs 1.4 MB).
Hardware Aware Training for Efficient Keyword Spotting on General Purpose and Specialized Hardwareeess.AS
New KWS neural networks improve accuracy and power efficiency.
problem Maximizing accuracy and power efficiency in KWS systems.
method Hardware Aware Training (HAT) for LMU-based neural networks.
result Achieved state-of-the-art accuracy and low parameter counts.
Low-power sensing technologies, such as wearables, have emerged in the healthcare domain since they enable continuous and non-invasive monitoring of physiological signals. In order to endow such devices with clinical value, classical signal processing has encountered numerous challenges. However, data-driven methods, s…
SEFR is a fast, energy-efficient classifier for ultra-low power devices.
problem Running machine learning on battery-powered devices is challenging due to time and energy constraints.
method SEFR is an ultra-low power classifier with linear time complexity for training and testing.
result SEFR is 63 times faster and 70 times more energy efficient than state-of-the-art classifiers.
The implementation of Deep Convolutional Neural Networks (ConvNets) on tiny end-nodes with limited non-volatile memory space calls for smart compression strategies capable of shrinking the footprint yet preserving predictive accuracy. There exist a number of strategies for this purpose, from those that play with the to…
We present here the Temporal Clustering Algorithm (TCA), an incremental learning algorithm applicable to problems of anticipatory computing in the context of the Internet of Things. This algorithm was tested in a specific prediction scenario of consumption of an electric water dispenser typically used in tropical count…
TinyLSTMs reduces speech enhancement model size and latency for hearing aids.
problem Large RNNs limit practical deployment in hearing aid hardware.
method Model compression techniques (pruning, integer quantization, state update skipping) for RNN speech enhancement.
result Reduction in model size and operations by 11.9 and 2.9, respectively, without perceptual degradation.
Low-cost sensor fusion for organic substance classification.
problem Non-destructive classification and quality control of organic substances.
method Arduino Mega 2560 microcontroller with three sensors, supervised learning models, hyperparameter tuning, PCA/LDA, ensemble voting classifier.
result Test accuracies of 93-94% for identifying organic compounds.
SIMCom: Statistical Sniffing of Inter-Module Communications for Run-time Hardware Trojan Detectioncs.CR
Timely detection of Hardware Trojans (HTs) has become a major challenge for secure integrated circuits. We present a run-time methodology for HT detection that employs a multi-parameter statistical traffic modeling of the communication channel in a given System-on-Chip (SoC), named as SIMCom. The main idea is to model …
This paper proposes IMU preintegrated features for efficient deep inertial odometry.
problem Efficient odometry from IMU data is challenging due to sensor imperfections and noise.
method Proposes IMU preintegrated features exploiting IMU motion model's manifold structure.
result Improves odometry performance and reduces computational burdens.
This paper develops the FastRNN and FastGRNN algorithms to address the twin RNN limitations of inaccurate training and inefficient prediction. Previous approaches have improved accuracy at the expense of prediction costs making them infeasible for resource-constrained and real-time applications. Unitary RNNs have incre…
In natural hazard warning systems fast decision making is vital to avoid catastrophes. Decision making at the edge of a wireless sensor network promises fast response times but is limited by the availability of energy, data transfer speed, processing and memory constraints. In this work we present a realization of a wi…
Review of efficient neural networks for TinyML on resource-constrained devices.
problem Resource constraints on ultra-low power MCUs for deep learning models.
method Model compression, quantization, low-rank factorization, model pruning, hardware acceleration, algorithm-architecture co-design.
result Optimized neural network architectures for minimal resource utilization on MCUs.
Computer vision performances have been significantly improved in recent years by Convolutional Neural Networks(CNN). Currently, applications using CNN algorithms are deployed mainly on general purpose hardwares, such as CPUs, GPUs or FPGAs. However, power consumption, speed, accuracy, memory footprint, and die size sho…
A trend towards energy-efficiency, security and privacy has led to a recent focus on deploying DNNs on microcontrollers. However, limits on compute and memory resources restrict the size and the complexity of the ML models deployable in these systems. Computation-In-Memory architectures based on resistive nonvolatile m…