Research
On-device research index

arXiv research

A locally-built, LLM-digested index of recent arXiv papers in quant finance, geometry/topology, and statistical ML — keyword search served straight from SQLite on this machine.

168,695 papers · 148 categories

Trend · papers per month

3367100133 · Jun 202019922001200920172026
48 results for hardware attacks

With the rising popularity of machine learning and the ever increasing demand for computational power, there is a growing need for hardware optimized implementations of neural networks and other machine learning models. As the technology evolves, it is also plausible that machine learning or artificial intelligence wil…

2018-06-14abs ↗pdf ↗

CLEANN detects and mitigates neural network Trojans without labeled data.

problem Trojans in embedded neural networks that bypass detection during inference.
method Dictionary learning and sparse approximation for identifying Trojan triggers, lightweight algorithm/hardware co-design.
result Efficient real-time execution on resource-constrained platforms, competitive attack resiliency.

Neural network quantization is becoming an industry standard to efficiently deploy deep learning models on hardware platforms, such as CPU, GPU, TPU, and FPGAs. However, we observe that the conventional quantization approaches are vulnerable to adversarial attacks. This paper aims to raise people's awareness about the …

2019-04-17abs ↗pdf ↗

We introduce CheckNet, a method for secure inference with deep neural networks on untrusted devices. CheckNet is like a checksum for neural network inference: it verifies the integrity of the inference computation performed by untrusted devices to 1) ensure the inference has actually been performed, and 2) ensure the i…

2019-06-17abs ↗pdf ↗

New sparsity attacks degrade DNN efficiency, raising concerns for resource-constrained systems.

problem Vulnerabilities in DNNs through energy and latency attacks.
method Proposed sparsity attacks that modify DNN inputs to reduce activation sparsity, increasing execution time and energy consumption.
result Adversarial sparsity attacks can degrade DNN efficiency by up to 1.82x in image recognition DNNs.

The paper presents a novel approach of spoofing wireless signals by using a general adversarial network (GAN) to generate and transmit synthetic signals that cannot be reliably distinguished from intended signals. It is of paramount importance to authenticate wireless signals at the PHY layer before they proceed throug…

2019-05-03abs ↗pdf ↗

Analog arrays are a promising upcoming hardware technology with the potential to drastically speed up deep learning. Their main advantage is that they compute matrix-vector products in constant time, irrespective of the size of the matrix. However, early convolution layers in ConvNets map very unfavorably onto analog a…

2018-07-03abs ↗pdf ↗

EagerNet detects network attacks quickly with less resources.

problem Efficiently detecting network attacks with minimal resources.
method Proposes a new architecture that trades prediction speed for accuracy, evaluating only a subset of layers.
result Comparable accuracies to simple FCNNs achieved with early predictions, saving energy and computational efforts.

Stablecoin system improves resilience to extreme market events.

problem Vulnerability of stablecoins to extreme volatility and adversarial attacks.
method MVF-Composer uses multi-agent simulations to stress-test and down-weight manipulative signals.
result Reduces peak peg deviation by 57% and mean recovery time by 3.1x under adversarial conditions.

Bio-inspired neuromorphic hardware is a research direction to approach brain's computational power and energy efficiency. Spiking neural networks (SNN) encode information as sparsely distributed spike trains and employ spike-timing-dependent plasticity (STDP) mechanism for learning. Existing hardware implementations of…

2018-09-18abs ↗pdf ↗

Novel 'strong neuron' improves deep learning efficiency and robustness.

problem Improving deep learning efficiency and robustness against adversarial attacks.
method Introducing a novel 'strong neuron' model and a constructive training algorithm.
result Achieved 10x-100x reduction in operations count and hardware requirements.

DANCE optimizes neural network and accelerator design for faster, more efficient DNN execution.

problem Challenges in optimizing neural network and accelerator design for efficient DNN execution.
method Differentiable approach to co-exploration of accelerator and network architecture design.
result Significantly shorter time to achieve superior accuracy and hardware cost metrics.

Recent breakthroughs in Deep Learning (DL) applications have made DL models a key component in almost every modern computing system. The increased popularity of DL applications deployed on a wide-spectrum of platforms have resulted in a plethora of design challenges related to the constraints introduced by the hardware…

2018-09-14abs ↗pdf ↗

Method predicts hardware resource usage by control software with guaranteed linear convergence.

problem Predicting time-varying hardware resource availability in control software.
method Path structured multimarginal Schrödinger bridge (MSBP) for learning stochastic resource usage.
result Guaranteed linear convergence to accurate prediction of hardware resource utilization.

Quantum algorithms for CVaR portfolio optimization face trade-offs between hardware coherence and expressibility.

problem Quantum algorithmic resilience for CVaR portfolio optimization
method WS-QAOA vs. HE-VQNN
result WS-QAOA provides exact theoretical mapping but suffers from hardware decoherence, while HE-VQNN preserves hardware coherence but lacks expressibility.

This paper tackles co-design of neural hardware and software to improve efficiency.

problem Designing efficient deep learning systems that consider both hardware and software optimizations together.
method Developed a constrained Bayesian optimization framework to automatically identify profitable design points in the joint hardware/software design space.
result Improved energy-delay product by 18% (ResNet) and 40% (DQN) over hand-tuned systems.

We derive scaling laws for optimizing neural networks in hardware.

problem Optimizing the large parameter space of neural networks in hardware.
method Analytical derivation of scaling laws for Coordinate Descent optimization.
result Convergence is exponential and scales linearly with the number of neurons.

This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementatio…

2014-09-09abs ↗pdf ↗

Optimized neural networks for Edge TPU achieve high accuracy in real-time image classification.

problem Designing neural networks for hardware accelerators to achieve optimal performance.
method Hardware-aware neural architecture search and model customization for Edge TPU.
result Improved accuracy-latency tradeoff on Pixel 4's Edge TPU compared to existing models.

VegasFlow accelerates complex simulations across various hardware platforms.

problem Complex calculations and simulations requiring high-dimensional integrals.
method Monte Carlo integration techniques using Vegas algorithm and TensorFlow.
result Significantly faster performance on various hardware platforms.

Secure neural network inference on untrusted platforms using holographic reduced representations.

problem Secure neural network inference on untrusted platforms.
method Connectionist Symbolic Pseudo Secrets using Holographic Reduced Representations (HRR).
result Empirical robustness to attack under various threat models.

Paper presents efficient algorithms for convolutional neural networks using Winograd minimal filtering.

problem Resource-efficient implementation of convolutional neural networks.
method Winograd minimal filtering trick applied to M-tap filters (M=3,5,7,9,11) for parallel hardware implementation.
result Approximately 30% reduction in multipliers for fully parallel hardware implementation.

Hardware-accelerated RBM solves large combinatorial problems and integer factorization.

problem Solving large combinatorial optimization and integer factorization problems.
method Logically synthesized RBM architecture, hardware acceleration, and efficient training methods.
result Hardware-accelerated RBM factorizes 16-bit numbers with 10000x speed and 32x power improvements.

Quantum algorithm reduces CVA risk-neutral expectation estimation costs.

problem Reducing Monte Carlo sampling cost for CVA on real quantum hardware.
method Noise-aware quantum workflow combining market calibration, discretisation, and oracle construction.
result CABIQAE achieves lower classical post-processing runtime and more effective error exploitation.

Improves VQAs by balancing classical and quantum training resources.

problem Challenges in trainability and resource costs of VQAs on quantum hardware.
method Adopting HELIA Ansatz and combining classical and quantum methods for gradient estimation and training.
result Achieves higher accuracy and success rates in VQE and improved test accuracy in quantum phase classification.

Pipelined Backpropagation trains large models without batches efficiently.

problem Training large models efficiently on hardware with limited batch sizes.
method Fine-grained Pipelined Backpropagation with Spike Compensation and Linear Weight Prediction.
result Fine-grained Pipelined Backpropagation with a batch size of one matches the accuracy of SGD for multiple networks.

HotNAS reduces AI search time from hundreds of GPU hours to less than 3 GPU hours.

problem High time required for AI solution generation from scratch.
method HotNAS starts from a 'hot' state using pre-trained models and integrates compression during co-search.
result Reduces search time from 200 GPU hours to less than 3 GPU hours.