A locally-built, LLM-digested index of recent arXiv papers in quant finance, geometry/topology, and statistical ML — keyword search served straight from SQLite on this machine.
New method speeds up sparse graph neural networks training on dense hardware.
Quantum algorithms for CVaR portfolio optimization face trade-offs between hardware coherence and expressibility.
Recurrent Neural Networks (RNNs) are used in state-of-the-art models in domains such as speech recognition, machine translation, and language modelling. Sparsity is a technique to reduce compute and memory requirements of deep learning models. Sparse RNNs are easier to deploy on devices and high-end server processors. …
The task of accelerating large neural networks on general purpose hardware has, in recent years, prompted the use of channel pruning to reduce network size. However, the efficacy of pruning based approaches has since been called into question. In this paper, we turn to distillation for model compression---specifically,…
Exploiting sparsity enables hardware systems to run neural networks faster and more energy-efficiently. However, most prior sparsity-centric optimization techniques only accelerate the forward pass of neural networks and usually require an even longer training process with iterative pruning and retraining. We observe t…
Sparse deep neural networks(DNNs) are efficient in both memory and compute when compared to dense DNNs. But due to irregularity in computation of sparse DNNs, their efficiencies are much lower than that of dense DNNs on regular parallel hardware such as TPU. This inefficiency leads to poor/no performance benefits for s…
The sizes of deep neural networks (DNNs) are rapidly outgrowing the capacity of hardware to store and train them. Research over the past few decades has explored the prospect of sparsifying DNNs before, during, and after training by pruning edges from the underlying topology. The resulting neural network is known as a …
The sizes of deep neural networks (DNNs) are rapidly outgrowing the capacity of hardware to store and train them. Research over the past few decades has explored the prospect of sparsifying DNNs before, during, and after training by pruning edges from the underlying topology. The resulting neural network is known as a …
This paper introduces channel gating, a dynamic, fine-grained, and hardware-efficient pruning scheme to reduce the computation cost for convolutional neural networks (CNNs). Channel gating identifies regions in the features that contribute less to the classification result, and skips the computation on a subset of the …
PARMESAN learns from memory without parameters for fast, efficient continual learning.
A new penalty-free method optimizes portfolios without quantum annealing penalties.
Investigates ways to train larger models with fewer resources, finding that test loss depends only on the actual number of trainable parameters.
Deep network solves maze path planning without training.
Deep-Lock secures DNN models with secret keys.
The wide adoption of DNNs has given birth to unrelenting computing requirements, forcing datacenter operators to adopt domain-specific accelerators to train them. These accelerators typically employ densely packed full precision floating-point arithmetic to maximize performance per area. Ongoing research efforts seek t…
Stochasticity and limited precision of synaptic weights in neural network models are key aspects of both biological and hardware modeling of learning processes. Here we show that a neural network model with stochastic binary weights naturally gives prominence to exponentially rare dense regions of solutions with a numb…
ROBEL platform accelerates reinforcement learning with low-cost robots.
Survey of Graph Neural Networks for efficient computation.
Without access to large compute clusters, building random forests on large datasets is still a challenging problem. This is, in particular, the case if fully-grown trees are desired. We propose a simple yet effective framework that allows to efficiently construct ensembles of huge trees for hundreds of millions or even…
SparseTrain uses dynamic sparsity in training deep neural networks on CPUs.
Bio-inspired neuromorphic hardware is a research direction to approach brain's computational power and energy efficiency. Spiking neural networks (SNN) encode information as sparsely distributed spike trains and employ spike-timing-dependent plasticity (STDP) mechanism for learning. Existing hardware implementations of…
Stealthy hardware Trojan exploits DLA architecture vulnerabilities.
Novel 'strong neuron' improves deep learning efficiency and robustness.
New KWS neural networks improve accuracy and power efficiency.
As neural networks become widely deployed in different applications and on different hardware, it has become increasingly important to optimize inference time and model size along with model accuracy. Most current techniques optimize model size, model accuracy and inference time in different stages, resulting in subopt…
Benchmark for DL inference on embedded HWAs, focusing on autonomous driving.
New Ising models improve consensus clustering on specialized hardware.
DANCE optimizes neural network and accelerator design for faster, more efficient DNN execution.
Automated design of resilient, efficient DNNs for hardware.
Recent breakthroughs in Deep Learning (DL) applications have made DL models a key component in almost every modern computing system. The increased popularity of DL applications deployed on a wide-spectrum of platforms have resulted in a plethora of design challenges related to the constraints introduced by the hardware…
Method predicts hardware resource usage by control software with guaranteed linear convergence.
Paper proposes a faster method for evaluating DNN hardware and software designs.
This paper tackles co-design of neural hardware and software to improve efficiency.
We derive scaling laws for optimizing neural networks in hardware.
New method bounds hardware noise without assumptions.
This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementatio…
Optimized neural networks for Edge TPU achieve high accuracy in real-time image classification.
Recent advances in deep neural networks (DNNs) owe their success to training algorithms that use backpropagation and gradient-descent. Backpropagation, while highly effective on von Neumann architectures, becomes inefficient when scaling to large networks. Commonly referred to as the weight transport problem, each neur…
With the rising popularity of machine learning and the ever increasing demand for computational power, there is a growing need for hardware optimized implementations of neural networks and other machine learning models. As the technology evolves, it is also plausible that machine learning or artificial intelligence wil…
VegasFlow accelerates complex simulations across various hardware platforms.
The ever increasing computational cost of Deep Neural Networks (DNN) and the demand for energy efficient hardware for DNN acceleration has made accuracy and hardware cost co-optimization for DNNs tremendously important, especially for edge devices. Owing to the large parameter space and cost of evaluating each paramete…
Paper presents efficient algorithms for convolutional neural networks using Winograd minimal filtering.
Hardware-accelerated RBM solves large combinatorial problems and integer factorization.
Simplifies convolutions using tensor networks and einsum for efficient second-order methods.
Quantum algorithm reduces CVA risk-neutral expectation estimation costs.
SparseRT accelerates sparse computations on GPUs for deep learning inference.
Improves VQAs by balancing classical and quantum training resources.
Pipelined Backpropagation trains large models without batches efficiently.